The present invention relates to a memory cell for maintaining a threshold voltage as data or a semiconductor nonvolatile memory device of which the data can be rewritten electrically and, more particularly, to a technique which is effective when applied to both a semiconductor nonvolatile memory device suited for frequently rewriting the data electrically and a computer system using the memory device.
As to the technique we have examined, for example, there is the so-called "flash memory (EEPROM)" belonging to the semiconductor nonvolatile memory device having the one-transistor/cell construction of which the data can be erased electrically in a batch. Attention has been focused on the flash memory in recent years because the area occupied by one bit is so small that it can be highly integrated, and the structure and driving method have been widely researched and developed.
For example, there have been proposed the DINOR method disclosed on pp. 97 to 98, "Symposium on VLSI Circuits Digest of Technical Papers", 1993, the NOR method disclosed on pp. 99 to 100 of the same, 1993, the AND method disclosed on pp. 61 to 62 of the same, 1994, and the HICR method disclosed on pp. 19 to 22, "International Electron Devices Meeting Tech. Dig.", 1993.
In each of the above-specified methods, the voltage applied to a selected word line in the reading time is the supply voltage Vcc (e.g., 3.3 V) applied to the memory device from the outside. More specifically, in the current characteristics (threshold characteristics) with respect to the word line voltage in the read operation, both states (e.g., the two threshold voltage states) of the memory cell are over 0 V, and the read voltage of the selected word line at this time is the supply voltage Vcc between the two states. The unselected word line voltage is below the voltage,i.e., the ground voltage Vss, corresponding to the lower threshold voltage.
Of the two states of the memory cell, the potential of the selected word line at the time of verifying the higher threshold value is higher than the maximum of the supply voltage Vcc and contains a retention margin, additionally. The verify potential on the lower threshold value side has a threshold over 0 V, at which the current of the memory cell does not flow at the unselected word line potential of 0 V. In the aforementioned AND method, for example, the verify word line potential is set to 1.5 V.
The read word line potential in the prior art described above is the supply voltage Vcc, and the threshold potential difference of the two states of the memory cell is over 3 V. The applied voltage necessary to rewrite (erase, program) the threshold of the memory cell in two states is determined by the coupling ratio, the threshold voltage Vthi and the higher threshold voltages VthH in the thermal equilibrium state, and the Vthi and the lower threshold voltage VthL. In order to change the threshold value of the memory cell to the higher state VthH in the aforementioned AND method, a voltage of 16 V is applied to the word line. For the lower state VthL, the voltage of the word line is a negative voltage of -9 V and the drain voltage is 4 V. Therefore a high potential is necessary.